Embedded design and especially design work utilizing low speed serial signaling is one of the fastest growing areas of digital electronics design. The need to communicate between modules, FPGAs, and processors within a wide array of consumer and industrial electronics is increasing at an astounding rate. Customized communication protocol and bus usage is critical to design efficiency and time to market, but comes with the risk of being sometimes difficult to analyze and debug. The most common sources and types of problems when using low speed serial data in an embedded application include timing, noise, signal quality, and data. We will recommend debug tips and features available in modern oscilloscopes that will make debugging these complex systems faster and easier.
Types of Errors
Timing is critical in any serial data system, but finding the system timing limitations related to components, transmission length, processing time, and other variables can be difficult. Let’s start with a simple 16 bit DAC circuit. First, make sure you understand the data and timing specifications for the protocol in use. Does it sample data right on the clock edge? How far off can the clock and data be when we still expect good data? In other words: do we have a clock sync error budget defined? Once we understand these timing requirements then we can experimentally verify both the Tx and Rx hardware subsystems. Now we can analyze the system level timing delays and the overall accuracy of the conversions because we can make direct measurements of both the logic and analog channels in a time correlated fashion. We will also be able to simultaneously view the decoded bit patterns numerically and graphically all on an oscilloscope that comes in well below your budget limits.
Here is a simple example of measuring a bit on channel 2 (blue) that is driving the DAC output that is creating the Sine wave on channel 1 (yellow).